Methods and tools for verification of embedded computer system fault tolerance

The goal of the project is to design and practically test the methods of fault tolerance verification, especially in the environment of control systems for highly reliable and safe real-time control.

Project overview

• Name: Methods and tools for verification of embedded computer system fault tolerance
• Funded by: Grant Agency of the Czech Republic (GAČR)
• Number: 102/03/0672
• Duration: 2003 - 2005
• Partners:
  • Czech Technical University in Prague
  • University of West Bohemia, Department of Computer Science and Engineering, ReliSA (formerly DSS) research group
  • Charles University, Department of Dependable and Distributed Systems
• Total grant support: CZK 3.0 million (EUR ~0.1 million)

Project synopsis

Three mutually complementary approaches, namely fault injection, analytical computation of the reliability characteristics and formal verification, are considered. The fault injection will be implemented by software (SWIFI) and applied to the simulation model allowing to implement the function of the fault injector as one of several processes run in a pseudoparallel mode. For the analytical computation a method based on generalized Markov models will be used. The formal verification will allow the specified properties of the system to be evaluated using its mathematical model and the efficiency of the methods used to be compared.

From this comparison we can draw some conclusions concerning the applicability of the investigated methods (individually or in combinations), and/or aiming at their improvement.

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